changeset 212:df00af7eb307 perf_counters

try 40 cores
author Nina Engelhardt <nengel@mailbox.tu-berlin.de>
date Fri, 09 Mar 2012 18:58:33 +0100
parents 5b419522dc7f
children c5c136fc3131
files CoreLoop.c VMS.h
diffstat 2 files changed, 4 insertions(+), 8 deletions(-) [+]
line diff
     1.1 --- a/CoreLoop.c	Thu Mar 08 19:02:16 2012 +0100
     1.2 +++ b/CoreLoop.c	Fri Mar 09 18:58:33 2012 +0100
     1.3 @@ -83,22 +83,18 @@
     1.4     
     1.5     if(thisCoresThdParams->coreNum == 0){
     1.6         uint64 initval = tsc_offset_send(thisCoresThdParams,0);
     1.7 -       ThdParams* sendCoresThdParams = coreLoopThdParams[NUM_CORES - 1];
     1.8 -       int sndctr = tsc_offset_resp(sendCoresThdParams,0);
     1.9 -       tsc_offset_send(thisCoresThdParams,initval);
    1.10 +       while(!coreLoopThdParams[NUM_CORES - 2]->ret_tsc);
    1.11     } 
    1.12     if(0 < (thisCoresThdParams->coreNum) && (thisCoresThdParams->coreNum) < (NUM_CORES - 1)){
    1.13         ThdParams* sendCoresThdParams = coreLoopThdParams[thisCoresThdParams->coreNum - 1];
    1.14         int sndctr = tsc_offset_resp(sendCoresThdParams, 0);
    1.15         uint64 initval = tsc_offset_send(thisCoresThdParams,0);
    1.16 -       tsc_offset_resp(sendCoresThdParams, sndctr);
    1.17 -       tsc_offset_send(thisCoresThdParams,initval);
    1.18 +       while(!coreLoopThdParams[NUM_CORES - 2]->ret_tsc);
    1.19     } 
    1.20     if(thisCoresThdParams->coreNum == (NUM_CORES - 1)){
    1.21         ThdParams* sendCoresThdParams = coreLoopThdParams[thisCoresThdParams->coreNum - 1];
    1.22         int sndctr = tsc_offset_resp(sendCoresThdParams,0);
    1.23 -       uint64 initval = tsc_offset_send(thisCoresThdParams,0);
    1.24 -       tsc_offset_resp(sendCoresThdParams,sndctr);
    1.25 +
    1.26     }
    1.27     
    1.28     //printf("Core %d starting!\n",thisCoresThdParams->coreNum);
     2.1 --- a/VMS.h	Thu Mar 08 19:02:16 2012 +0100
     2.2 +++ b/VMS.h	Fri Mar 09 18:58:33 2012 +0100
     2.3 @@ -82,7 +82,7 @@
     2.4  //=========================  Hardware related Constants =====================
     2.5     //This value is the number of hardware threads in the shared memory
     2.6     // machine
     2.7 -#define NUM_CORES        80
     2.8 +#define NUM_CORES        40
     2.9  
    2.10     // tradeoff amortizing master fixed overhead vs imbalance potential
    2.11     // when work-stealing, can make bigger, at risk of losing cache affinity