# HG changeset patch
# User Nina Engelhardt <nengel@mailbox.tu-berlin.de>
# Date 1331315913 -3600
# Node ID df00af7eb3076867f0ebe7f6afd3cc03f0ae31d0
# Parent  5b419522dc7f3e834fc5ce4ff127904a4100936e
try 40 cores

diff -r 5b419522dc7f -r df00af7eb307 CoreLoop.c
--- a/CoreLoop.c	Thu Mar 08 19:02:16 2012 +0100
+++ b/CoreLoop.c	Fri Mar 09 18:58:33 2012 +0100
@@ -83,22 +83,18 @@
    
    if(thisCoresThdParams->coreNum == 0){
        uint64 initval = tsc_offset_send(thisCoresThdParams,0);
-       ThdParams* sendCoresThdParams = coreLoopThdParams[NUM_CORES - 1];
-       int sndctr = tsc_offset_resp(sendCoresThdParams,0);
-       tsc_offset_send(thisCoresThdParams,initval);
+       while(!coreLoopThdParams[NUM_CORES - 2]->ret_tsc);
    } 
    if(0 < (thisCoresThdParams->coreNum) && (thisCoresThdParams->coreNum) < (NUM_CORES - 1)){
        ThdParams* sendCoresThdParams = coreLoopThdParams[thisCoresThdParams->coreNum - 1];
        int sndctr = tsc_offset_resp(sendCoresThdParams, 0);
        uint64 initval = tsc_offset_send(thisCoresThdParams,0);
-       tsc_offset_resp(sendCoresThdParams, sndctr);
-       tsc_offset_send(thisCoresThdParams,initval);
+       while(!coreLoopThdParams[NUM_CORES - 2]->ret_tsc);
    } 
    if(thisCoresThdParams->coreNum == (NUM_CORES - 1)){
        ThdParams* sendCoresThdParams = coreLoopThdParams[thisCoresThdParams->coreNum - 1];
        int sndctr = tsc_offset_resp(sendCoresThdParams,0);
-       uint64 initval = tsc_offset_send(thisCoresThdParams,0);
-       tsc_offset_resp(sendCoresThdParams,sndctr);
+
    }
    
    //printf("Core %d starting!\n",thisCoresThdParams->coreNum);
diff -r 5b419522dc7f -r df00af7eb307 VMS.h
--- a/VMS.h	Thu Mar 08 19:02:16 2012 +0100
+++ b/VMS.h	Fri Mar 09 18:58:33 2012 +0100
@@ -82,7 +82,7 @@
 //=========================  Hardware related Constants =====================
    //This value is the number of hardware threads in the shared memory
    // machine
-#define NUM_CORES        80
+#define NUM_CORES        40
 
    // tradeoff amortizing master fixed overhead vs imbalance potential
    // when work-stealing, can make bigger, at risk of losing cache affinity