1.1 --- /dev/null	Thu Jan 01 00:00:00 1970 +0000
     1.2 +++ b/Counters/Counters.c	Tue Jul 26 15:35:57 2011 +0200
     1.3 @@ -0,0 +1,14 @@
     1.4 +#include "Counters.h"
     1.5 +
     1.6 +
     1.7 +void print_record(CounterRecord* record){
     1.8 +    printf("=== Loop Stats: ===");
     1.9 +    printf("Constraints check done:\t%ld cycles, %ld instrs [Core %d]\n",record->sc_done_cycles,record->sc_done_instrs,record->req_core);
    1.10 +    printf("Ready Queue entered at:\t%ld cycles, %ld instrs [Core %d]\n",record->enter_readyQ_cycles,record->enter_readyQ_instrs,record->req_core);
    1.11 +    printf("Assigner started:\t%ld cycles, %ld instrs [Core %d]\n",record->start_assign_cycles,record->start_assign_instrs,record->assigning_core);
    1.12 +    printf("Assigner ended:\t%ld cycles, %ld instrs [Core %d]\n",record->end_assign_cycles,record->end_assign_instrs,record->assigning_core);
    1.13 +    printf("Work+comm started:\t%ld cycles, %ld instrs [Core %d]\n",record->start_work_cycles,record->start_work_instrs,record->work_core);
    1.14 +    printf("Work+comm ended:\t%ld cycles, %ld instrs [Core %d]\n",record->suspend_cycles,record->suspend_instrs,record->work_core);
    1.15 +    printf("Request read:\t%ld cycles, %ld instrs [Core %d]\n",record->req_cycles,record->req_instrs,record->req_core);  
    1.16 +}
    1.17 +    

     2.1 --- /dev/null	Thu Jan 01 00:00:00 1970 +0000
     2.2 +++ b/Counters/Counters.h	Tue Jul 26 15:35:57 2011 +0200
     2.3 @@ -0,0 +1,37 @@
     2.4 +/* 
     2.5 + * File:   counters.h
     2.6 + * Author: engelhardt
     2.7 + *
     2.8 + * Created on 20. Juli 2011, 13:27
     2.9 + */
    2.10 +
    2.11 +#include "../VMS_primitive_data_types.h"
    2.12 +#include "../DynArray/DynArray.h"
    2.13 +
    2.14 +#ifndef COUNTERS_H
    2.15 +#define	COUNTERS_H
    2.16 +
    2.17 +typedef struct {
    2.18 +    int work_core;
    2.19 +    int assigning_core;
    2.20 +    int req_core;
    2.21 +    uint64 req_cycles;
    2.22 +    uint64 req_instrs;
    2.23 +    uint64 sc_done_cycles;
    2.24 +    uint64 sc_done_instrs;
    2.25 +    uint64 enter_readyQ_cycles;
    2.26 +    uint64 enter_readyQ_instrs;
    2.27 +    uint64 start_assign_cycles;
    2.28 +    uint64 start_assign_instrs;
    2.29 +    uint64 end_assign_cycles;
    2.30 +    uint64 end_assign_instrs;
    2.31 +    uint64 start_work_cycles;
    2.32 +    uint64 start_work_instrs;
    2.33 +    uint64 suspend_cycles;
    2.34 +    uint64 suspend_instrs;
    2.35 +} CounterRecord;
    2.36 +
    2.37 +void print_record(CounterRecord* record);
    2.38 +
    2.39 +#endif	/* COUNTERS_H */
    2.40 +