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4618b5af3b04 0__Papers/Holistic_Model/Perf_Tune/latex/Holistic_Perf_Tuning.pdf Binary file 0__Papers/Holistic_Model/Perf_Tune/latex/Holistic_Perf_Tuning.pdf has changed diff -r 56a95617a079 -r 4618b5af3b04 0__Papers/Holistic_Model/Perf_Tune/latex/Holistic_Perf_Tuning.tex --- a/0__Papers/Holistic_Model/Perf_Tune/latex/Holistic_Perf_Tuning.tex Mon Jul 09 17:58:14 2012 +0200 +++ b/0__Papers/Holistic_Model/Perf_Tune/latex/Holistic_Perf_Tuning.tex Fri Jul 13 15:36:29 2012 -0700 @@ -120,17 +120,17 @@ \subsection{Thread-model based Approaches} Most of the early, more established, tools come from the threads world, and conceive of the application as a collection of virtual processors (threads) that perform actions, but don't include the concept of application-defined tasks nor constraints on them. This makes the tools unable to directly connect statistics they gather to scheduling choices and application features. That lack of connection forces the user to guess at what aspect of the code is responsible for observed performance. -Tau [] represents the thread-centric approach well. It integrates many data sources, and has rich displays. However it models cores and memories, and thread contexts, with actions taken on or by each. Because it had no well defined concept of unit of work, constraints on them, and scheduling choices, it was unable to help the user form hypotheses for the parallelism-specific causes of poor performance. +Tau \cite{PerfToolTau} represents the thread-centric approach well. It integrates many data sources, and has rich displays. However it models cores and memories, and thread contexts, with actions taken on or by each. Because it had no well defined concept of unit of work, constraints on them, and scheduling choices, it was unable to help the user form hypotheses for the parallelism-specific causes of poor performance. \subsection{Event-centric approach} -A second classic approach models parallel computation as a collection of events. Paradyn[] represents this category well. Its model of computation is based on both the timing of events and counts of events. +A second classic approach models parallel computation as a collection of events. Paradyn \cite{PerfToolParadyn} represents this category well. Its model of computation is based on both the timing of events and counts of events. It has a system for user-supplied instrumentation to collect event information and it has a hypothesis mechanism that protects the user from having to write custom code to test their hypotheses. However, the hypotheses are in terms of the timing and counts of events, not the parallel computation relevant information of units of scheduled work and the scheduling decisions made on those. As such, it helps to test hypothesis but not to generate them. \subsection{Message-centric approach} -Paragraph also follows an event-based model, but represents the large collection of simpler tools that instrument the MPI or other message-passing library. It shows whether cores are busy, and indicates communication overhead and flight time, but lacks an underlying parallel computation model. Without such a model, it is difficult to tie the communication pattern realized to application code features, which are what is under programmer control. Hence such message-based approaches also provide no help in forming hypotheses of which code features are responsible for observed performance. +Paragraph \cite{PerfToolParagraph} also follows an event-based model, but represents the large collection of simpler tools that instrument the MPI or other message-passing library. It shows whether cores are busy, and indicates communication overhead and flight time, but lacks an underlying parallel computation model. Without such a model, it is difficult to tie the communication pattern realized to application code features, which are what is under programmer control. Hence such message-based approaches also provide no help in forming hypotheses of which code features are responsible for observed performance. %Note that Paraver and Vampir are just painting tools that take event measurements and paint them on the screen. @@ -140,9 +140,9 @@ \subsection{Newer approaches} - Recent parallel languages have begun exposing units and constraints on them, for example CnC[] and StarSs[]. This provides the tools with the chance to link measurements to a model of parallel computation, such as the one we propose. The user can then link such measurements to the units defined in their code, and form hypothesis about what to change to improve performance. + Recent parallel languages have begun exposing units and constraints on them, for example CnC\cite{CnCInHotPar} and StarSs \cite{StarSs}. This provides the tools with the chance to link measurements to a model of parallel computation, such as the one we propose. The user can then link such measurements to the units defined in their code, and form hypothesis about what to change to improve performance. -As an example, the performance tuning tool[] that comes with StarSs provides a view of the code-defined units to the user. For a specific machine, it tells the user whether it thinks the task size is too small, just right, or too big. Too small has too much runtime overhead, while too big has too few tasks to keep the cores busy. This view simplifies things for the user by providing the hypothesis of what's causing poor performance and directly linking it to codde. +As an example, the performance tuning tool \cite{PerfToolStarSs} that comes with StarSs provides a view of the code-defined units to the user. For a specific machine, it tells the user whether it thinks the task size is too small, just right, or too big. Too small has too much runtime overhead, while too big has too few tasks to keep the cores busy. This view simplifies things for the user by providing the hypothesis of what's causing poor performance and directly linking it to codde. This is a step in the right direction, but it gives the programmer only limited information. Subtle and complex interactions between code, runtime, and hardware are often to blame for performance loss, and the limited information supplied here doesn't help with such complexities. Also, the tool is language specific, and so doesn't apply to applications in other languages. @@ -185,14 +185,33 @@ \subsection{The Visualizations} \label{subsec:visualization_def} - The first visualization is what we refer to as a scheduling consequence graph (SCG), or just consequence graph (CG). It depicts the scheduling operations performed by the runtime, and the consequent usage of the cores. + The first visualization is what we refer to as a Unit \& Constraint Collection, or UCC. It depicts the constraints on the scheduling decisions that come from the application. Constraints can be dependencies stated explicitly in the code, or can be implied by language constructs. These limit the choices the runtime is allowed to make. -The second visualization we call the Unit \& Constraint Collection, or UCC. It depicts constraints on the scheduling decisions that come from the application. Constraints can be dependencies stated explicitly in the code, or can be implied by language constructs. These limit the choices the runtime is allowed to make. +The second visualization we call the scheduling consequence graph (SCG), or just consequence graph (CG). It depicts the scheduling operations performed by the runtime, and the consequent usage of the cores. -The UCC shows only application-derived information, as opposed to the consequence graph, which combines the \textit{use} of the UCC-depicted constraints with runtime-imposed dependencies and hardware-imposed constraints. Hence, the UCC states the degrees of freedom enabled by the application, while the consequence graph states how those were made use of, by a particular runtime on particular hardware. +The UCC shows only application-derived information, as opposed to the consequence graph, which combines the \textit{use} of the UCC-depicted constraints along with runtime-imposed dependencies and hardware-imposed constraints. Hence, the UCC states the degrees of freedom enabled by the application, while the consequence graph states how those were made use of, by a particular runtime on particular hardware. +\subsubsection{UCC visualization} + +\begin{figure}[ht] + \centering + \includegraphics[width = 3.2in, height = 1.8in]{../figures/UCC_stylized_for_expl.pdf} + \caption{Two versions of a stylized Unit and Constraint Collection (UCC). The left UCC treats each unit as the same size, while the right UCC is weighted by amount of work in a unit.} + \label{fig:UCC_expl} +\end{figure} + + +Fig \ref{fig:UCC_expl} shows two versions of a UCC, both stylized for purposes of explanation. These are used less often than the SCG, mainly as a helper when brainstorming ways to get more usable parallelism out of an application. + +Both versions of the UCC depict constraints on units. Starting at the top, they progress downwards, placing units that constrain being above those constrained by them, and connecting them by a line representing the constraint. A unit is placed into the row just below the last of the units constraining it, in the first available column. However, the rows and columns are just visual conveniences; the only information in the UCC is the lines between units, which represent constraints among the units. In practice, each unit is also labeled with a unique unit ID, from which the code of the unit and the parameters passed to it can be looked up. + +What distinguishes the two types of UCC is the size of the units. The left one treats all units as the same size, while the right weights the height of a unit by the number of instructions executed in it. By inspection, it can be seen that both have the same structure, but the rightmost does a better job of visually indicating the \textit{useable} parallelism available. + + + +\subsubsection{SCG visualization} \begin{figure}[ht] \centering \includegraphics[width = 2in, height = 1.8in]{../figures/SCG_stylized_for_expl.pdf} @@ -202,7 +221,9 @@ -Fig \ref{fig:SCG_expl} shows a consequence graph, stylized for purposes of explanation. It is composed of a number of columns, one for each core. A column represents time on the core, increasing as one goes down, measured in clock cycles. It is broken into blocks, each representing the time accounted to one work-unit. Each block is further divided into regions, each a different color, which indicates the kind of activity the core was engaged in during that region's time-span. +Fig \ref{fig:SCG_expl} shows a consequence graph, stylized for purposes of explanation. This is the main visualization used during performance tuning, because it shows the consequent uses of the cores in the machine, and links those to the constraints and code in the application. + +It is composed of a number of columns, one for each core. A column represents time on the core, increasing as one goes down, measured in clock cycles. It is broken into blocks, each representing the time accounted to one work-unit. Each block is further divided into regions, each a different color, which indicates the kind of activity the core was engaged in during that region's time-span. The application code executed within a block is linked to the block. In our tool, the block is labelled with a unique unitID. This ID is then linked to the code executed within that unit. In this way, the code of any block can be looked up, along with the parallelism constructs that mark the start and end of the block. @@ -331,7 +352,14 @@ Some applications have everything determined in the code, with all units fixed, and all constraints fixed. An example is matrix multiply with fixed size matrices. But for others, the shape of the UCC is only partially defined by the application code. Take matrix multiply used in Section \ref{sec:casestudy}, where an input parameter determines the number of units created. Here, the UCC is different for each parameter value. An extreme example is an NP complete problem, with redividable units, for which the units are a function of both the input data \emph{and} decisions made by the runtime. - We call a fully specified UCC a \emph{concrete} UCC. Every run of an application eventually winds up defining a concrete UCC, such as seen back in Fig \ref{fig:UCC_example}. But the amount of UCC made concrete by the application alone falls into a two-dimensional grid. One dimension covers the units, the other the constraints. +\begin{figure}[ht] + \centering + \includegraphics[width = 3.2in, height = 1.8in]{../figures/UCC_weighted.pdf} + \caption{Concrete UCC measured for matrix mulitply during the performance tuning in Section \ref{sec:casestudy}.} + \label{fig:UCC_Concreteness} +\end{figure} + + We call a fully specified UCC a \emph{concrete} UCC. Every run of an application eventually winds up defining a concrete UCC, such as produced for the performance tuning seen in Fig \ref{fig:UCC_example}. But the amount of UCC made concrete by the application alone falls into a two-dimensional grid. One dimension covers the units, the other the constraints. \begin{figure}[ht] @@ -401,7 +429,7 @@ To a runtime high up, each runtime below it looks like a complete machine. It schedules work-units to those machines, without knowing the internal details of how that machine is implemented. So the runtime at the top handles very large work-units that it schedules onto the runtimes on the boards. A board-level runtime divides up the work-unit it gets into smaller work-units, then schedules one onto each socket's runtime, and so on. -The application in this example has been written in a language that allows work to be divided. The toolchain inserted a manipulator that allows each runtime to divide up the work it is given into smaller work-units, such as via the DKU pattern[]. This pushed the UCC of the application all the way to the right on the unit axis. +The application in this example has been written in a language that allows work to be divided. The toolchain inserted a manipulator that allows each runtime to divide up the work it is given into smaller work-units, such as via the DKU pattern \cite{DKUTechRep_09}. This pushed the UCC of the application all the way to the right on the unit axis. So what does the concrete UCC produced during a run look like? Well, a unit is defined as the work resulting from one scheduling decision. Each runtime has its own scheduler, which means units are defined for each runtime. That in turn means that each runtime has its own concrete UCC! @@ -513,7 +541,7 @@ \subsubsection{Recording time, instructions, and cache misses } Just recording the units and connections between them is not enough. Because the SCG represents core usage, it also needs the cycles spent on each activity, including internal runtime activities. The size of each interval of core usage is recorded and assigned to a segment of a particular unit's life-line. -The UCC also makes use of the number of instructions in a unit, as an estimate of size of work in the unit, as illustrated by Fig [UCC same-sz vs UCC instr-sz]. Without knowing the relative size of the units, it is hard to estimate the amount of parallelism \emph{usefully} available in the application. +The UCC also makes use of the number of instructions in a unit, as an estimate of size of work in the unit, as illustrated by Fig [fig:UCC_expl]. Without knowing the relative size of the units, it is hard to estimate the amount of parallelism \emph{usefully} available in the application. To measure the instructions, cycles, and communication (cache misses), we use hardware performance counters. Readings are inserted into the runtime code to capture core time spent on each segment of the life-line of a unit: \begin{enumerate} @@ -573,6 +601,9 @@ \label{sec:conclusion} We have shown how to apply a computation model to instrument a language runtime for collecting measurements that connect: each measurement to others, to application structure, to scheduling decisions, and to hardware. A simple visualization of the data has features that indicate lost performance, and features that visually link the lost performance to the cause, no matter if the cause is application structure, language runtime implementation, or hardware feature. It is this linkage, due to the computation model, that sets this approach apart from others. +\bibliography{bib_for_papers_12_Jy_15} + + \end{document} =============== @@ -691,7 +722,7 @@ In addition to identifying the units and the relations between them, we need to capture how much work a unit represents and how many resources (mainly core-time) it occupies. -For performance tuning it is obviously critical to know the actual performance, but even for the UCC these measurements are important. Indeed, as evidenced by Fig [UCC with identical-size units vs UCC with units sized by instruction count], without knowing the relative size of the units, it is hard so estimate the amount of parallelism in the application. +For performance tuning it is obviously critical to know the actual performance, but even for the UCC these measurements are important. Indeed, as evidenced by Fig [fig:UCC_expl], without knowing the relative size of the units, it is hard so estimate the amount of parallelism in the application. We use hardware performance counters to measure for each unit the work (=time spent in application code) and the overhead (=time spent in runtime) in cycles and in instructions, as well as the number of last level cache misses during the work. The counter values are retrieved in the runtime before and after several sections in the lifetime of a unit: \begin{itemize} @@ -985,3 +1016,4 @@ + diff -r 56a95617a079 -r 4618b5af3b04 0__Papers/Holistic_Model/Perf_Tune/latex/bib_for_papers_12_Jy_15.bib --- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/0__Papers/Holistic_Model/Perf_Tune/latex/bib_for_papers_12_Jy_15.bib Fri Jul 13 15:36:29 2012 -0700 @@ -0,0 +1,946 @@ +@Article{StarSs, + author = {Planas, J. and Badia, R.M. and Ayguad{\'e}, E. and Labarta, J.}, + title = {Hierarchical task-based programming with StarSs}, + journal = {International Journal of High Performance Computing Applications}, + year = 2009, + volume = 23, + number = 3, + pages = {284--299} +} +@InBook{PerfToolPoem, + title = {The Poems of John Godfrey Saxe, Complete edition}, + chapter = {The Blind Men and the Elephant}, + author = {John Godfrey Saxe}, + publisher = {Boston: James R. Osgood and Company}, + year = 1873, + pages = {77-78} +} +@Article{PerfToolTau, + author = {Shende, Sameer S. and Malony, Allen D.}, + title = {The Tau Parallel Performance System}, + volume = 20, + number = 2, + pages = {287-311}, + year = {Summer 2006}, + journal = {International Journal of High Performance Computing Applications} +} +@Article{PerfToolParadyn, + author = {Miller, B.P. and Callaghan, M.D. and Cargille, J.M. and Hollingsworth, J.K. and Irvin, R.B. and Karavanic, K.L. and Kunchithapadam, K. and Newhall, T.}, + journal = {Computer}, + title = {The Paradyn parallel performance measurement tool}, + year = 1995, + month = {nov}, + volume = 28, + number = 11, + pages = {37 -46} +} +@Article{PerfToolParagraph, + author = {Heath, M.T. and Etheridge, J.A.}, + journal = {Software, IEEE}, + title = {Visualizing the performance of parallel programs}, + year = 1991, + month = {sept. }, + volume = 8, + number = 5, + pages = {29 -39} +} +@Article{PerfToolStarSs, + author = {Steffen Brinkmann and Jos{\'e} Gracia and Christoph Niethammer and Rainer Keller}, + title = {TEMANEJO - a debugger for task based parallel programming models}, + journal = {CoRR}, + volume = {abs/1112.4604}, + year = 2011 +} +@techrep{SyncConstr_impl_w_distr_coherence_HW_Utah_96, + author = {Carter, J. B. and Kuo, C.-C. and Kuramkote, R.}, + title = { A comparison of software and hardware synchronization mechanisms for distributed shared memory multiprocessors}, + institution = {University of Utah, Salt Lake City, UT}, + year = 1996, + url = {http://www.cs.utah.edu/research/techreports/1996/pdf/UUCS-96-011.pdf}, + number = {UUCS-96-011} +} +@Article{SWCoherence_Hill_SW_for_shared_coherence_w_HW_support_93, + author = {Hill, Mark D. and Larus, James R. and Reinhardt, Steven K. and Wood, David A.}, + title = {Cooperative shared memory: software and hardware for scalable multiprocessors}, + journal = {ACM Trans. Comput. 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