1.1 --- /dev/null	Thu Jan 01 00:00:00 1970 +0000
     1.2 +++ b/.hgeol	Fri Aug 09 18:37:30 2013 -0700
     1.3 @@ -0,0 +1,12 @@
     1.4 +
     1.5 +[patterns]
     1.6 +**.py = native
     1.7 +**.txt = native
     1.8 +**.c = native
     1.9 +**.h = native
    1.10 +**.cpp = native
    1.11 +**.java = native
    1.12 +**.sh = native
    1.13 +**.pl = native
    1.14 +**.jpg = bin
    1.15 +**.gif = bin

     2.1 --- /dev/null	Thu Jan 01 00:00:00 1970 +0000
     2.2 +++ b/__README__about_dir.txt	Fri Aug 09 18:37:30 2013 -0700
     2.3 @@ -0,0 +1,6 @@
     2.4 +
     2.5 +This directory is a copy of /usr/lib/PR__lib
     2.6 +
     2.7 +It holds the static and dynamic library files (.a and .so), for all the independent libraries created, related to proto-runtime (as of now, just the universal version).
     2.8 +
     2.9 +

     3.1 --- /dev/null	Thu Jan 01 00:00:00 1970 +0000
     3.2 +++ b/__brch__Dev_Univ	Fri Aug 09 18:37:30 2013 -0700
     3.3 @@ -0,0 +1,28 @@
     3.4 +This branch is for developing the multi-language capability in VMS.  The idea is to define langlets, whose constructs can be freely mixed together inside application code.  No need to separate into distinct modules.  A single function can use constructs from all the different langlets together inside itself.
     3.5 +
     3.6 +
     3.7 +========  Background on branch naming  =========
     3.8 +
     3.9 +There are two kinds of branchs: ones used to develop features, and ones tuned to particular hardware.  A given HW branch may combine features from several feature-branches, picking and choosing among them.
    3.10 +
    3.11 +After Feb 2012, branches are named by the scheme:
    3.12 +
    3.13 +feat__<feat_descr>__<HW_feat_dev_on>
    3.14 +
    3.15 +HW__<desc_of_HW_brch_tuned_for>
    3.16 +
    3.17 +where <HW_feat_dev_on> and <desc_of_HW_brch_tuned_for> follow the pattern:
    3.18 +
    3.19 +<num_socket> x <num_cores>_<Manuf>_<special_features>
    3.20 +
    3.21 +Examples:
    3.22 +
    3.23 +feat__exp_array_malloc
    3.24 +
    3.25 +feat__rand_backoff__4x10_Intel_WestmereEx
    3.26 +
    3.27 +HW__1x4_Intel_SandyBridge
    3.28 +
    3.29 +HW__4x10_Intel_WestmereEx
    3.30 +
    3.31 +HW__1x4_AMD_mobile

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