diff libavcodec/x86/mmx.h @ 2:897f711a7157

rearrange to work with autoconf
author Nina Engelhardt <nengel@mailbox.tu-berlin.de>
date Tue, 25 Sep 2012 15:55:33 +0200
parents
children
line diff
     1.1 --- /dev/null	Thu Jan 01 00:00:00 1970 +0000
     1.2 +++ b/libavcodec/x86/mmx.h	Tue Sep 25 15:55:33 2012 +0200
     1.3 @@ -0,0 +1,267 @@
     1.4 +/*
     1.5 + * mmx.h
     1.6 + * Copyright (C) 1997-2001 H. Dietz and R. Fisher
     1.7 + *
     1.8 + * This file is part of FFmpeg.
     1.9 + *
    1.10 + * FFmpeg is free software; you can redistribute it and/or
    1.11 + * modify it under the terms of the GNU Lesser General Public
    1.12 + * License as published by the Free Software Foundation; either
    1.13 + * version 2.1 of the License, or (at your option) any later version.
    1.14 + *
    1.15 + * FFmpeg is distributed in the hope that it will be useful,
    1.16 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
    1.17 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
    1.18 + * Lesser General Public License for more details.
    1.19 + *
    1.20 + * You should have received a copy of the GNU Lesser General Public
    1.21 + * License along with FFmpeg; if not, write to the Free Software
    1.22 + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
    1.23 + */
    1.24 +#ifndef AVCODEC_X86_MMX_H
    1.25 +#define AVCODEC_X86_MMX_H
    1.26 +
    1.27 +#warning Everything in this header is deprecated, use plain __asm__()! New code using this header will be rejected.
    1.28 +
    1.29 +
    1.30 +#define         mmx_i2r(op,imm,reg) \
    1.31 +        __asm__ volatile (#op " %0, %%" #reg \
    1.32 +                              : /* nothing */ \
    1.33 +                              : "i" (imm) )
    1.34 +
    1.35 +#define         mmx_m2r(op,mem,reg) \
    1.36 +        __asm__ volatile (#op " %0, %%" #reg \
    1.37 +                              : /* nothing */ \
    1.38 +                              : "m" (mem))
    1.39 +
    1.40 +#define         mmx_r2m(op,reg,mem) \
    1.41 +        __asm__ volatile (#op " %%" #reg ", %0" \
    1.42 +                              : "=m" (mem) \
    1.43 +                              : /* nothing */ )
    1.44 +
    1.45 +#define         mmx_r2r(op,regs,regd) \
    1.46 +        __asm__ volatile (#op " %" #regs ", %" #regd)
    1.47 +
    1.48 +
    1.49 +#define         emms() __asm__ volatile ("emms")
    1.50 +
    1.51 +#define         movd_m2r(var,reg)           mmx_m2r (movd, var, reg)
    1.52 +#define         movd_r2m(reg,var)           mmx_r2m (movd, reg, var)
    1.53 +#define         movd_r2r(regs,regd)         mmx_r2r (movd, regs, regd)
    1.54 +
    1.55 +#define         movq_m2r(var,reg)           mmx_m2r (movq, var, reg)
    1.56 +#define         movq_r2m(reg,var)           mmx_r2m (movq, reg, var)
    1.57 +#define         movq_r2r(regs,regd)         mmx_r2r (movq, regs, regd)
    1.58 +
    1.59 +#define         packssdw_m2r(var,reg)       mmx_m2r (packssdw, var, reg)
    1.60 +#define         packssdw_r2r(regs,regd)     mmx_r2r (packssdw, regs, regd)
    1.61 +#define         packsswb_m2r(var,reg)       mmx_m2r (packsswb, var, reg)
    1.62 +#define         packsswb_r2r(regs,regd)     mmx_r2r (packsswb, regs, regd)
    1.63 +
    1.64 +#define         packuswb_m2r(var,reg)       mmx_m2r (packuswb, var, reg)
    1.65 +#define         packuswb_r2r(regs,regd)     mmx_r2r (packuswb, regs, regd)
    1.66 +
    1.67 +#define         paddb_m2r(var,reg)          mmx_m2r (paddb, var, reg)
    1.68 +#define         paddb_r2r(regs,regd)        mmx_r2r (paddb, regs, regd)
    1.69 +#define         paddd_m2r(var,reg)          mmx_m2r (paddd, var, reg)
    1.70 +#define         paddd_r2r(regs,regd)        mmx_r2r (paddd, regs, regd)
    1.71 +#define         paddw_m2r(var,reg)          mmx_m2r (paddw, var, reg)
    1.72 +#define         paddw_r2r(regs,regd)        mmx_r2r (paddw, regs, regd)
    1.73 +
    1.74 +#define         paddsb_m2r(var,reg)         mmx_m2r (paddsb, var, reg)
    1.75 +#define         paddsb_r2r(regs,regd)       mmx_r2r (paddsb, regs, regd)
    1.76 +#define         paddsw_m2r(var,reg)         mmx_m2r (paddsw, var, reg)
    1.77 +#define         paddsw_r2r(regs,regd)       mmx_r2r (paddsw, regs, regd)
    1.78 +
    1.79 +#define         paddusb_m2r(var,reg)        mmx_m2r (paddusb, var, reg)
    1.80 +#define         paddusb_r2r(regs,regd)      mmx_r2r (paddusb, regs, regd)
    1.81 +#define         paddusw_m2r(var,reg)        mmx_m2r (paddusw, var, reg)
    1.82 +#define         paddusw_r2r(regs,regd)      mmx_r2r (paddusw, regs, regd)
    1.83 +
    1.84 +#define         pand_m2r(var,reg)           mmx_m2r (pand, var, reg)
    1.85 +#define         pand_r2r(regs,regd)         mmx_r2r (pand, regs, regd)
    1.86 +
    1.87 +#define         pandn_m2r(var,reg)          mmx_m2r (pandn, var, reg)
    1.88 +#define         pandn_r2r(regs,regd)        mmx_r2r (pandn, regs, regd)
    1.89 +
    1.90 +#define         pcmpeqb_m2r(var,reg)        mmx_m2r (pcmpeqb, var, reg)
    1.91 +#define         pcmpeqb_r2r(regs,regd)      mmx_r2r (pcmpeqb, regs, regd)
    1.92 +#define         pcmpeqd_m2r(var,reg)        mmx_m2r (pcmpeqd, var, reg)
    1.93 +#define         pcmpeqd_r2r(regs,regd)      mmx_r2r (pcmpeqd, regs, regd)
    1.94 +#define         pcmpeqw_m2r(var,reg)        mmx_m2r (pcmpeqw, var, reg)
    1.95 +#define         pcmpeqw_r2r(regs,regd)      mmx_r2r (pcmpeqw, regs, regd)
    1.96 +
    1.97 +#define         pcmpgtb_m2r(var,reg)        mmx_m2r (pcmpgtb, var, reg)
    1.98 +#define         pcmpgtb_r2r(regs,regd)      mmx_r2r (pcmpgtb, regs, regd)
    1.99 +#define         pcmpgtd_m2r(var,reg)        mmx_m2r (pcmpgtd, var, reg)
   1.100 +#define         pcmpgtd_r2r(regs,regd)      mmx_r2r (pcmpgtd, regs, regd)
   1.101 +#define         pcmpgtw_m2r(var,reg)        mmx_m2r (pcmpgtw, var, reg)
   1.102 +#define         pcmpgtw_r2r(regs,regd)      mmx_r2r (pcmpgtw, regs, regd)
   1.103 +
   1.104 +#define         pmaddwd_m2r(var,reg)        mmx_m2r (pmaddwd, var, reg)
   1.105 +#define         pmaddwd_r2r(regs,regd)      mmx_r2r (pmaddwd, regs, regd)
   1.106 +
   1.107 +#define         pmulhw_m2r(var,reg)         mmx_m2r (pmulhw, var, reg)
   1.108 +#define         pmulhw_r2r(regs,regd)       mmx_r2r (pmulhw, regs, regd)
   1.109 +
   1.110 +#define         pmullw_m2r(var,reg)         mmx_m2r (pmullw, var, reg)
   1.111 +#define         pmullw_r2r(regs,regd)       mmx_r2r (pmullw, regs, regd)
   1.112 +
   1.113 +#define         por_m2r(var,reg)            mmx_m2r (por, var, reg)
   1.114 +#define         por_r2r(regs,regd)          mmx_r2r (por, regs, regd)
   1.115 +
   1.116 +#define         pslld_i2r(imm,reg)          mmx_i2r (pslld, imm, reg)
   1.117 +#define         pslld_m2r(var,reg)          mmx_m2r (pslld, var, reg)
   1.118 +#define         pslld_r2r(regs,regd)        mmx_r2r (pslld, regs, regd)
   1.119 +#define         psllq_i2r(imm,reg)          mmx_i2r (psllq, imm, reg)
   1.120 +#define         psllq_m2r(var,reg)          mmx_m2r (psllq, var, reg)
   1.121 +#define         psllq_r2r(regs,regd)        mmx_r2r (psllq, regs, regd)
   1.122 +#define         psllw_i2r(imm,reg)          mmx_i2r (psllw, imm, reg)
   1.123 +#define         psllw_m2r(var,reg)          mmx_m2r (psllw, var, reg)
   1.124 +#define         psllw_r2r(regs,regd)        mmx_r2r (psllw, regs, regd)
   1.125 +
   1.126 +#define         psrad_i2r(imm,reg)          mmx_i2r (psrad, imm, reg)
   1.127 +#define         psrad_m2r(var,reg)          mmx_m2r (psrad, var, reg)
   1.128 +#define         psrad_r2r(regs,regd)        mmx_r2r (psrad, regs, regd)
   1.129 +#define         psraw_i2r(imm,reg)          mmx_i2r (psraw, imm, reg)
   1.130 +#define         psraw_m2r(var,reg)          mmx_m2r (psraw, var, reg)
   1.131 +#define         psraw_r2r(regs,regd)        mmx_r2r (psraw, regs, regd)
   1.132 +
   1.133 +#define         psrld_i2r(imm,reg)          mmx_i2r (psrld, imm, reg)
   1.134 +#define         psrld_m2r(var,reg)          mmx_m2r (psrld, var, reg)
   1.135 +#define         psrld_r2r(regs,regd)        mmx_r2r (psrld, regs, regd)
   1.136 +#define         psrlq_i2r(imm,reg)          mmx_i2r (psrlq, imm, reg)
   1.137 +#define         psrlq_m2r(var,reg)          mmx_m2r (psrlq, var, reg)
   1.138 +#define         psrlq_r2r(regs,regd)        mmx_r2r (psrlq, regs, regd)
   1.139 +#define         psrlw_i2r(imm,reg)          mmx_i2r (psrlw, imm, reg)
   1.140 +#define         psrlw_m2r(var,reg)          mmx_m2r (psrlw, var, reg)
   1.141 +#define         psrlw_r2r(regs,regd)        mmx_r2r (psrlw, regs, regd)
   1.142 +
   1.143 +#define         psubb_m2r(var,reg)          mmx_m2r (psubb, var, reg)
   1.144 +#define         psubb_r2r(regs,regd)        mmx_r2r (psubb, regs, regd)
   1.145 +#define         psubd_m2r(var,reg)          mmx_m2r (psubd, var, reg)
   1.146 +#define         psubd_r2r(regs,regd)        mmx_r2r (psubd, regs, regd)
   1.147 +#define         psubw_m2r(var,reg)          mmx_m2r (psubw, var, reg)
   1.148 +#define         psubw_r2r(regs,regd)        mmx_r2r (psubw, regs, regd)
   1.149 +
   1.150 +#define         psubsb_m2r(var,reg)         mmx_m2r (psubsb, var, reg)
   1.151 +#define         psubsb_r2r(regs,regd)       mmx_r2r (psubsb, regs, regd)
   1.152 +#define         psubsw_m2r(var,reg)         mmx_m2r (psubsw, var, reg)
   1.153 +#define         psubsw_r2r(regs,regd)       mmx_r2r (psubsw, regs, regd)
   1.154 +
   1.155 +#define         psubusb_m2r(var,reg)        mmx_m2r (psubusb, var, reg)
   1.156 +#define         psubusb_r2r(regs,regd)      mmx_r2r (psubusb, regs, regd)
   1.157 +#define         psubusw_m2r(var,reg)        mmx_m2r (psubusw, var, reg)
   1.158 +#define         psubusw_r2r(regs,regd)      mmx_r2r (psubusw, regs, regd)
   1.159 +
   1.160 +#define         punpckhbw_m2r(var,reg)      mmx_m2r (punpckhbw, var, reg)
   1.161 +#define         punpckhbw_r2r(regs,regd)    mmx_r2r (punpckhbw, regs, regd)
   1.162 +#define         punpckhdq_m2r(var,reg)      mmx_m2r (punpckhdq, var, reg)
   1.163 +#define         punpckhdq_r2r(regs,regd)    mmx_r2r (punpckhdq, regs, regd)
   1.164 +#define         punpckhwd_m2r(var,reg)      mmx_m2r (punpckhwd, var, reg)
   1.165 +#define         punpckhwd_r2r(regs,regd)    mmx_r2r (punpckhwd, regs, regd)
   1.166 +
   1.167 +#define         punpcklbw_m2r(var,reg)      mmx_m2r (punpcklbw, var, reg)
   1.168 +#define         punpcklbw_r2r(regs,regd)    mmx_r2r (punpcklbw, regs, regd)
   1.169 +#define         punpckldq_m2r(var,reg)      mmx_m2r (punpckldq, var, reg)
   1.170 +#define         punpckldq_r2r(regs,regd)    mmx_r2r (punpckldq, regs, regd)
   1.171 +#define         punpcklwd_m2r(var,reg)      mmx_m2r (punpcklwd, var, reg)
   1.172 +#define         punpcklwd_r2r(regs,regd)    mmx_r2r (punpcklwd, regs, regd)
   1.173 +
   1.174 +#define         pxor_m2r(var,reg)           mmx_m2r (pxor, var, reg)
   1.175 +#define         pxor_r2r(regs,regd)         mmx_r2r (pxor, regs, regd)
   1.176 +
   1.177 +
   1.178 +/* 3DNOW extensions */
   1.179 +
   1.180 +#define         pavgusb_m2r(var,reg)        mmx_m2r (pavgusb, var, reg)
   1.181 +#define         pavgusb_r2r(regs,regd)      mmx_r2r (pavgusb, regs, regd)
   1.182 +
   1.183 +
   1.184 +/* AMD MMX extensions - also available in intel SSE */
   1.185 +
   1.186 +
   1.187 +#define         mmx_m2ri(op,mem,reg,imm) \
   1.188 +        __asm__ volatile (#op " %1, %0, %%" #reg \
   1.189 +                              : /* nothing */ \
   1.190 +                              : "m" (mem), "i" (imm))
   1.191 +#define         mmx_r2ri(op,regs,regd,imm) \
   1.192 +        __asm__ volatile (#op " %0, %%" #regs ", %%" #regd \
   1.193 +                              : /* nothing */ \
   1.194 +                              : "i" (imm) )
   1.195 +
   1.196 +#define         mmx_fetch(mem,hint) \
   1.197 +        __asm__ volatile ("prefetch" #hint " %0" \
   1.198 +                              : /* nothing */ \
   1.199 +                              : "m" (mem))
   1.200 +
   1.201 +
   1.202 +#define         maskmovq(regs,maskreg)      mmx_r2ri (maskmovq, regs, maskreg)
   1.203 +
   1.204 +#define         movntq_r2m(mmreg,var)       mmx_r2m (movntq, mmreg, var)
   1.205 +
   1.206 +#define         pavgb_m2r(var,reg)          mmx_m2r (pavgb, var, reg)
   1.207 +#define         pavgb_r2r(regs,regd)        mmx_r2r (pavgb, regs, regd)
   1.208 +#define         pavgw_m2r(var,reg)          mmx_m2r (pavgw, var, reg)
   1.209 +#define         pavgw_r2r(regs,regd)        mmx_r2r (pavgw, regs, regd)
   1.210 +
   1.211 +#define         pextrw_r2r(mmreg,reg,imm)   mmx_r2ri (pextrw, mmreg, reg, imm)
   1.212 +
   1.213 +#define         pinsrw_r2r(reg,mmreg,imm)   mmx_r2ri (pinsrw, reg, mmreg, imm)
   1.214 +
   1.215 +#define         pmaxsw_m2r(var,reg)         mmx_m2r (pmaxsw, var, reg)
   1.216 +#define         pmaxsw_r2r(regs,regd)       mmx_r2r (pmaxsw, regs, regd)
   1.217 +
   1.218 +#define         pmaxub_m2r(var,reg)         mmx_m2r (pmaxub, var, reg)
   1.219 +#define         pmaxub_r2r(regs,regd)       mmx_r2r (pmaxub, regs, regd)
   1.220 +
   1.221 +#define         pminsw_m2r(var,reg)         mmx_m2r (pminsw, var, reg)
   1.222 +#define         pminsw_r2r(regs,regd)       mmx_r2r (pminsw, regs, regd)
   1.223 +
   1.224 +#define         pminub_m2r(var,reg)         mmx_m2r (pminub, var, reg)
   1.225 +#define         pminub_r2r(regs,regd)       mmx_r2r (pminub, regs, regd)
   1.226 +
   1.227 +#define         pmovmskb(mmreg,reg) \
   1.228 +        __asm__ volatile ("movmskps %" #mmreg ", %" #reg)
   1.229 +
   1.230 +#define         pmulhuw_m2r(var,reg)        mmx_m2r (pmulhuw, var, reg)
   1.231 +#define         pmulhuw_r2r(regs,regd)      mmx_r2r (pmulhuw, regs, regd)
   1.232 +
   1.233 +#define         prefetcht0(mem)             mmx_fetch (mem, t0)
   1.234 +#define         prefetcht1(mem)             mmx_fetch (mem, t1)
   1.235 +#define         prefetcht2(mem)             mmx_fetch (mem, t2)
   1.236 +#define         prefetchnta(mem)            mmx_fetch (mem, nta)
   1.237 +
   1.238 +#define         psadbw_m2r(var,reg)         mmx_m2r (psadbw, var, reg)
   1.239 +#define         psadbw_r2r(regs,regd)       mmx_r2r (psadbw, regs, regd)
   1.240 +
   1.241 +#define         pshufw_m2r(var,reg,imm)     mmx_m2ri(pshufw, var, reg, imm)
   1.242 +#define         pshufw_r2r(regs,regd,imm)   mmx_r2ri(pshufw, regs, regd, imm)
   1.243 +
   1.244 +#define         sfence() __asm__ volatile ("sfence\n\t")
   1.245 +
   1.246 +/* SSE2 */
   1.247 +#define         pshufhw_m2r(var,reg,imm)    mmx_m2ri(pshufhw, var, reg, imm)
   1.248 +#define         pshufhw_r2r(regs,regd,imm)  mmx_r2ri(pshufhw, regs, regd, imm)
   1.249 +#define         pshuflw_m2r(var,reg,imm)    mmx_m2ri(pshuflw, var, reg, imm)
   1.250 +#define         pshuflw_r2r(regs,regd,imm)  mmx_r2ri(pshuflw, regs, regd, imm)
   1.251 +
   1.252 +#define         pshufd_r2r(regs,regd,imm)   mmx_r2ri(pshufd, regs, regd, imm)
   1.253 +
   1.254 +#define         movdqa_m2r(var,reg)         mmx_m2r (movdqa, var, reg)
   1.255 +#define         movdqa_r2m(reg,var)         mmx_r2m (movdqa, reg, var)
   1.256 +#define         movdqa_r2r(regs,regd)       mmx_r2r (movdqa, regs, regd)
   1.257 +#define         movdqu_m2r(var,reg)         mmx_m2r (movdqu, var, reg)
   1.258 +#define         movdqu_r2m(reg,var)         mmx_r2m (movdqu, reg, var)
   1.259 +#define         movdqu_r2r(regs,regd)       mmx_r2r (movdqu, regs, regd)
   1.260 +
   1.261 +#define         pmullw_r2m(reg,var)         mmx_r2m (pmullw, reg, var)
   1.262 +
   1.263 +#define         pslldq_i2r(imm,reg)         mmx_i2r (pslldq, imm, reg)
   1.264 +#define         psrldq_i2r(imm,reg)         mmx_i2r (psrldq, imm, reg)
   1.265 +
   1.266 +#define         punpcklqdq_r2r(regs,regd)   mmx_r2r (punpcklqdq, regs, regd)
   1.267 +#define         punpckhqdq_r2r(regs,regd)   mmx_r2r (punpckhqdq, regs, regd)
   1.268 +
   1.269 +
   1.270 +#endif /* AVCODEC_X86_MMX_H */