# HG changeset patch # User Nina Engelhardt # Date 1334683137 -7200 # Node ID cfca88034000138013f425ad5e2866de7272e414 # Parent bf6a4474f0e027a9bf40db1766db229dc6ee5891 Performance debug series: original code (with divider bug) diff -r bf6a4474f0e0 -r cfca88034000 SSR_Matrix_Mult/Divide_Pr.c --- a/SSR_Matrix_Mult/Divide_Pr.c Tue Apr 17 19:32:08 2012 +0200 +++ b/SSR_Matrix_Mult/Divide_Pr.c Tue Apr 17 19:18:57 2012 +0200 @@ -196,7 +196,7 @@ DEBUG__printf(dbgAppFlow,"**create result Pr**") resultPr = - SSR__create_procr_with_affinity( &gatherResults, resultsParams, animPr,0); + SSR__create_procr_with( &gatherResults, resultsParams, animPr); //Make the sub-matrices, and pair them up, and make processor to // calc product of each pair. @@ -261,7 +261,7 @@ idealNumWorkUnits = SSR__giveIdealNumWorkUnits(); idealSizeOfSide2 = leftMatrix->numRows / rint(cbrt( idealNumWorkUnits )); - idealSizeOfSide2 *= 0.4; //finer granularity to help load balance + idealSizeOfSide2 *= 0.6; //finer granularity to help load balance if( idealSizeOfSide1 > idealSizeOfSide2 ) idealSizeOfSide = idealSizeOfSide1; @@ -367,10 +367,10 @@ numCores = SSR__give_number_of_cores_to_schedule_onto(); - numToPutOntoEachCore = numRowIdxs*numColIdxs/(numCores-1); + numToPutOntoEachCore = numRowIdxs*numColIdxs/numCores; leftOverFraction = 0; numVecOnCurrCore = 0; - coreToAssignOnto = 1; + coreToAssignOnto = 0; for( resRowIdx = 0; resRowIdx < numRowIdxs; resRowIdx++ ) { @@ -402,7 +402,7 @@ // that each core gets the same number of vectors, with a max // imbalance of 1 vector more on some cores than others numVecOnCurrCore += 1; //incr before checking, so - if( numVecOnCurrCore > numToPutOntoEachCore ) //actual num 1 less + } if( numVecOnCurrCore > numToPutOntoEachCore ) //actual num 1 less { //deal with fractional part, to ensure that imbalance is 1 max // IE, core with most has only 1 more than core with least @@ -412,9 +412,9 @@ //Move to next core, max core-value to incr to is numCores -1 coreToAssignOnto += 1; - if( coreToAssignOnto >= numCores ) coreToAssignOnto = 1; + if( coreToAssignOnto >= numCores ) coreToAssignOnto = 0; } //if - } //for( vecIdx + //for( vecIdx } //for( resColIdx } //for( resRowIdx