# HG changeset patch
# User Merten Sach <msach@mailbox.tu-berlin.de>
# Date 1328292252 -3600
# Node ID a8312581709c60046ecd20e78afbab41b9ca6756
# Parent  91d0d2e06719395f9cd1d314af4b91f15ebe656e# Parent  f89bf9e368f546df5deeef8698e21fd394917f9f
merge of changes from xoanon

diff -r 91d0d2e06719 -r a8312581709c CoreLoop.c
--- a/CoreLoop.c	Fri Feb 03 17:57:09 2012 +0100
+++ b/CoreLoop.c	Fri Feb 03 19:04:12 2012 +0100
@@ -48,7 +48,7 @@
    volatile int32 *masterLock;
    VirtProcr      *masterVP;
    
-   double         workspace1,workspace2; //variables for master lock busy waiting
+   volatile double workspace1,workspace2; //variables for master lock busy waiting
 
    // init random number generator for retries
    uint32_t seed1 = rand()%1000;
@@ -144,12 +144,11 @@
        {    //queue was empty, so get master lock
 
 	if(numMasterInARow > 2){
-                wait_iterations=(randomNumber(&seed1, &seed2) % (numMasterInARow*numMasterInARow))*100;
+                wait_iterations=(randomNumber(&seed1, &seed2) % (numMasterInARow*NUM_CORES));
 	   	int i;
 	  	for(i=0; i<wait_iterations; i++)
                 {/*busy wait*/
                     workspace1 += (workspace1 + 32)/2;
-                    workspace2 += (workspace2 + 23.2)/1.4;
                 }
         }
                  
@@ -171,7 +170,6 @@
 	   for(i=0; i<wait_iterations; i++)
            {/*busy wait*/
                 workspace1 += (workspace1 + 32)/2;
-                workspace2 += (workspace2 + 23.2)/1.4;
            }
 	}
 
@@ -211,9 +209,9 @@
           #endif
           //==================================================
    }//CoreLoop
-   
-   return (workspace1 + workspace2); //gcc fake out for -O3
- }
+  
+   return (void*)&workspace1; //gcc fake out for -O3
+}
 
 inline uint32_t
 randomNumber(uint32_t* seed1, uint32_t* seed2){
diff -r 91d0d2e06719 -r a8312581709c VMS_defs.h
--- a/VMS_defs.h	Fri Feb 03 17:57:09 2012 +0100
+++ b/VMS_defs.h	Fri Feb 03 19:04:12 2012 +0100
@@ -81,7 +81,7 @@
 
    // tradeoff amortizing master fixed overhead vs imbalance potential
    // when work-stealing, can make bigger, at risk of losing cache affinity
-#define NUM_SCHED_SLOTS  5
+#define NUM_SCHED_SLOTS  3
 
 #define MIN_WORK_UNIT_CYCLES 20000
 
@@ -91,7 +91,7 @@
 #define VIRT_PROCR_STACK_SIZE 0x8000 /* 32K */
 
    // memory for VMS__malloc
-#define MALLOC_ADDITIONAL_MEM_FROM_OS_SIZE 0x10000000 /* 256M */
+#define MALLOC_ADDITIONAL_MEM_FROM_OS_SIZE 0x40000000 /* 1G */
 
 #define CACHE_LINE 64
 #define PAGE_SIZE 4096